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Surname	Name	Title	Thesis status		Supervisors	Reviewers	Type of thesis	Date of def.	Title
Student	Type of thesis	-	-	-	-	-	-	-	-	-	-
Guzma	Tomáš	High Performance Lookup Algorithms for Ethernet			Dolinay Jan	Špaček Ondřej	Master's thesis	05.06.2024	High Performance Lookup Algorithms for Ethernet
Tomáš Guzma	Master's thesis	0XX	0XX	0XX	0XX	0XX	0XX	0XX	0XX	0XX	0XX

Thesis info Vysoce výkonné vyhledávací algoritmy pro Ethernet

Basic data

Annotation
The document you are accessing is protected by copyright law. Unauthorised use may lead to criminal sanctions.
Name	Guzma Tomáš
Acad. Yr.	2023/2024
Assigning department	AUIUI
Date of defence	Jun 5, 2024
Type of thesis	Master's thesis
Thesis status	Thesis finished and defended successfully (DUO).
Completeness of mandatory entries	- All mandatory fields for this Thesis are filled in.
Main topic	Vysoce výkonné vyhledávací algoritmy pro Ethernet
Main topic in English	High Performance Lookup Algorithms for Ethernet
Title according to student	Vysoce výkonné vyhledávací algoritmy pro Ethernet
English title as given by the student	High Performance Lookup Algorithms for Ethernet
Parallel name	-
Subtitle	-
Thesis supervisor	Dolinay Jan, Ing. Ph.D.
External examiner	Špaček Ondřej, Ing.
Annotation	Táto diplomová práca sa venuje hľadaniu vhodných algoritmov pre vysoko výkonné vyhľadávanie v Ethernete na zvolenom RISC-V akcelerátore od firmy NXP Semiconductors . Výsledkom diplomovej práce bude program, ktorý bude slúžiť ako základ pre benchmarkovanie vysoko výkonných vyhľadávacích algoritmov pre Ethernet. Prínosom tejto práce je spomínaný program a odporúčanie vhodného algoritmu na použitie pre RISC-V Ethernet akcelerátor pre firmu NXP Semiconductors. Teoretická časť sa je zameraná na popis Ethernetu, testovaných algoritmov a hardvéru, na ktorom porovnanie prebieha. Praktická časť sa venuje implementácií benchmarkovacieho programu, ktorý porovnáva vysoko výkonné vyhľadávacie algoritmy pre Ethernet.
Annotation in English	This master thesis is devoted to finding suitable algorithms for high performance Ethernet search on a selected RISC-V accelerator from NXP Semiconductors. The result of the master's thesis will be a program that will serve as a basis for benchmarking high-performance search algorithms for Ethernet. The contribution of this thesis is the already mentioned program and the recommendation of a suitable algorithm to be used for the RISC-V Ethernet accelerator for NXP Semiconductors. The theoretical part is focused on the description of Ethernet, the algorithms tested and the hardware on which the comparison is performed. The practical part is devoted to the implementation of a benchmarking program that compares high-performance lookup algorithms for Ethernet.
Keywords	Ethernet, RISC-V, akcelerátor, hash tabuľky, C, C++, Python
Keywords in English	Ethernet, RISC-V, accelerator, hash tables, C, C++, Python
Length of the covering note	81
Language	SK
Táto diplomová práca sa venuje hľadaniu vhodných algoritmov pre vysoko výkonné vyhľadávanie v Ethernete na zvolenom RISC-V akcelerátore od firmy NXP Semiconductors . Výsledkom diplomovej práce bude program, ktorý bude slúžiť ako základ pre benchmarkovanie vysoko výkonných vyhľadávacích algoritmov pre Ethernet. Prínosom tejto práce je spomínaný program a odporúčanie vhodného algoritmu na použitie pre RISC-V Ethernet akcelerátor pre firmu NXP Semiconductors. Teoretická časť sa je zameraná na popis Ethernetu, testovaných algoritmov a hardvéru, na ktorom porovnanie prebieha. Praktická časť sa venuje implementácií benchmarkovacieho programu, ktorý porovnáva vysoko výkonné vyhľadávacie algoritmy pre Ethernet.
Annotation in English
This master thesis is devoted to finding suitable algorithms for high performance Ethernet search on a selected RISC-V accelerator from NXP Semiconductors. The result of the master's thesis will be a program that will serve as a basis for benchmarking high-performance search algorithms for Ethernet. The contribution of this thesis is the already mentioned program and the recommendation of a suitable algorithm to be used for the RISC-V Ethernet accelerator for NXP Semiconductors. The theoretical part is focused on the description of Ethernet, the algorithms tested and the hardware on which the comparison is performed. The practical part is devoted to the implementation of a benchmarking program that compares high-performance lookup algorithms for Ethernet.
Keywords
Ethernet, RISC-V, akcelerátor, hash tabuľky, C, C++, Python
Keywords in English
Ethernet, RISC-V, accelerator, hash tables, C, C++, Python
Research Plan	Zpracujte literární rešerši na dané téma. Vyberte několik algoritmů pro rychlé Ethernetové vyhledávání vhodných pro použití v embedded aplikacích. Vybrané algoritmy implementujte na zvoleném Ethernetovém RISC-V akcelerátoru. Změřte výkonnost implementovaných algoritmů. Zpracujte srovnání implementovaných algoritmů a zhodnoťte jejich výhody a nevýhody.
Research Plan
Zpracujte literární rešerši na dané téma. Vyberte několik algoritmů pro rychlé Ethernetové vyhledávání vhodných pro použití v embedded aplikacích. Vybrané algoritmy implementujte na zvoleném Ethernetovém RISC-V akcelerátoru. Změřte výkonnost implementovaných algoritmů. Zpracujte srovnání implementovaných algoritmů a zhodnoťte jejich výhody a nevýhody.
Recommended resources	KIRSCH, A., MITZENMACHER, M. Less Hashing, Same Performance: Building a Better Bloom Filter. In: Azar, Y., Erlebach, T. (eds) Algorithms – ESA 2006. ESA 2006. Lecture Notes in Computer Science, vol 4168. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11841036_42. PATTERSON David, WATERMAN Andrew. The RISC-V Reader: An Open Architecture Atlas. Strawberry Canyon, 2017, 200 s. ISBN: 978-0999249116. SPURGEON, Charles E., ZIMMERMAN, Joann. Ethernet: The Definitive Guide, 2nd Edition. O'Reilly Media, 2014, 527 s. ISBN 9781449363000. TANENBAUM Andrew, WETHERALL David. Computer Networks (5th Edition). Pearson, 2010, 980 s. ISBN: 978-0132126953. SHI, Xiao a Nathan BRONSON. Open-sourcing F14 for faster, more memory-efficient hash tables. Engineering at Meta [online]. 2019. Dostupné z: https://engineering.fb.com/2019/04/25/developer-tools/f14/. [citováno. 2023-11-02]. JUNGHWAN Kim a MYEONG-CHEOL Ko. A Novel Prefix Cache with Two-Level Bloom Filters in IP Address Lookup. Applied Sciences [online]. 2020. Dostupné z: https://www.mdpi.com/2076-3417/10/20/7198. [citováno 2023-11-02].
Recommended resources
KIRSCH, A., MITZENMACHER, M. Less Hashing, Same Performance: Building a Better Bloom Filter. In: Azar, Y., Erlebach, T. (eds) Algorithms – ESA 2006. ESA 2006. Lecture Notes in Computer Science, vol 4168. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11841036_42. PATTERSON David, WATERMAN Andrew. The RISC-V Reader: An Open Architecture Atlas. Strawberry Canyon, 2017, 200 s. ISBN: 978-0999249116. SPURGEON, Charles E., ZIMMERMAN, Joann. Ethernet: The Definitive Guide, 2nd Edition. O'Reilly Media, 2014, 527 s. ISBN 9781449363000. TANENBAUM Andrew, WETHERALL David. Computer Networks (5th Edition). Pearson, 2010, 980 s. ISBN: 978-0132126953. SHI, Xiao a Nathan BRONSON. Open-sourcing F14 for faster, more memory-efficient hash tables. Engineering at Meta [online]. 2019. Dostupné z: https://engineering.fb.com/2019/04/25/developer-tools/f14/. [citováno. 2023-11-02]. JUNGHWAN Kim a MYEONG-CHEOL Ko. A Novel Prefix Cache with Two-Level Bloom Filters in IP Address Lookup. Applied Sciences [online]. 2020. Dostupné z: https://www.mdpi.com/2076-3417/10/20/7198. [citováno 2023-11-02].
Týká se praxe	No
Enclosed appendices	-
Appendices bound in thesis	illustrations, graphs
Taken from the library	No
Full text of the thesis
Appendices
Reviewer's report
Supervisor's report
Defence procedure record file